This invention relates to a signal synchronization method and a receiver device that are applicable to a communication system. More particularly, the method and device conduct packet communication in bursts or asynchronously for receiving a packet signal appended at its head with a known number of repetition signals and generating a synchronization signal on the basis of a correlation value of this received signal.
In a communication system which conducts packet communication in bursts, because the arrival of packet signals is not predictable, it is necessary for individual demodulation synchronization processing to be carried out on the receiving side for each packet. To this end, it is proposed that a known number N of repetition signals are appended to the head of each packet as a preamble and on the receiving side a synchronization signal is generated when the repetition signals appended to the head of the packet are recognized. For example, “A performance of a Symbol Timing Detection Circuit for OFDM Wireless LAN Systems” published as B-5-61 in 1999 Communication Society Conference of Electronics and Information Communications Institute teaches that a synchronization signal is generated on the basis of peak integration processing being carried out with a digital filter on a correlator output (correlation peak signal) of the received signal.
However, because the correlator output is a multi-bit signal, multi-bit signal delay circuits and adders are needed in the digital filter for carrying out the peak integration processing. Consequently, the digital filter circuit becomes large-sized.